With the advent of modern day electronics, the circuits on a PCB (Printed Circuit Board) or modules or chips have become more and more dense. As a result the electrical lines or conductor lines and terminals or pads have become smaller so that more of them can be placed in a given area.
It therefore becomes necessary to make increasingly smaller electrical connections between these lines and pads to complete electrical functionality. The increased density of these electrical connections increases the probability that the conductor lines or paths will have to be rerouted.
The rerouting of the conductor lines are among the most important steps in the packaging technology. This is because the electronic hardware must be reliable and free from defects, as they are very expensive to manufacture and field failures cannot be repaired easily. In addition, due to the large size of the package (tens of millimeters), which supports a large area interconnection between silicon or other devices, it is not practical to isolate and throw away the defective part of the package, as is commonly done in the manufacture of silicon chips. To eliminate these immediate and potential defects, tremendous efforts are being made.
This rerouting of electrical wires is done for a variety of reasons. The first and foremost reason is for the purpose of E.C. (Engineering Change), which customizes a part for a particular performance requirement. Other reasons for re-routing electrical wires are defects or cracks in lines, or shorts between lines. Defects or faults in a conductor line could be due to masking or improper deposition of the conductive material. But they could also be related to other factors, such as impure material or stretching the resolution limits of the lithography process. The thin film redistribution lines may have opens due to contamination, process mishaps and physical damage.
Another reason for opens is due to stresses generated during thermal cycles in device attach and test processes used during assembly of PCB or ceramic modules. The thin film lines with cracks and other latent defects may develop opens. These opens could either be repaired or the signal line rerouted in order to use the substrate or module or package which would otherwise be electrically defective.
Particularly, in the thin film processing, the thin film redistribution and other interconnection lines are susceptible to defects which could result in the lines being electrically open. Defects could include voids, missing metal, various particle contamination or physical damage. A redundant metal scheme helps to substantially reduce the number of defective lines, but this scheme does not eliminate them entirely. Those lines identified as "open" after thin film electrical test can be repaired by processes such as laser CVD (Chemical Vapor Deposition) prior to a polyimide overcoat process. Occasionally an "open" line will go undetected through test or becomes "open" during subsequent thermal processing. These defective conductors appear in the module or substrate, after pins, capacitors and chips are joined. If an "open" line should be found at this point, it is essential to repair the defect so that the module or the substrate or the package can be used.
Recently non-destructive electrical testing methods (for example, NLC (Nonlinear Conductivity) tester as disclosed in U.S. Pat. No. 4,496,900) have been developed. The NLC tester locates the lines with current constricting defects, such as, cracks, line breaks, intermittent opens, narrow necks, etc. The method of high pulse current, as discussed elsewhere, can then be used to open up the defects. This process is utilized due to the fact that it is easier to visually locate the complete opens than latent defects.
It is disclosed in, "Repairing Breaks in Printed Circuits," IBM Technical Disclosure Bulletin, Vol. 8, No. 11, Page 1469 (April 1966), that small breaks in a line can be repaired by filling the gap in the broken line with a material that is cured at room temperature or higher to form a base conductive material. A conductive metal layer is then electroplated over the base conductive material to complete the repair. Using this process would require that lines to be repaired, on extremely dense packages with chips, capacitors and discrete wires in place, be isolated during electroplating. This would create significant handling and tooling problem.
"Open Conductor Repair For Glass Metal Module," IBM Technical Disclosure Bulletin, Vol. 14, No. 10, Page 2915 (March 1972), discloses another method of making open repairs. Here a metal line to be transferred is aligned over the open or break, and using a laser beam, a portion of the metal layer is welded to each end of the broken line. This article also teaches that the line could be reflowed into the break using a laser or it could be evaporated into the break. Each of these features cannot be used with the present invention, because the melting of high temperature conductive metals, such as copper, is used. Energy required to melt such lines by laser would damage polyimide adjacent to the lines to be repaired.
Another disclosure entitled "Welding Device Utilizing Laser Beams" 3,463,898 describes the simultaneous plural spot melting of metal and metal alloys of Al, Au and Ni, etc. By using a split beam laser focused onto two different spots on an electrode, the entire metal electrode becomes hot. Although the melting does occur simultaneously, the temperatures involved in melting the metals and metal alloy ranges from 600.degree. C. to 1400.degree. C. These temperatures are so high they would not only destroy the adhesion interface between the metal bond tabs and the polymer structure below it but would probably melt or deform several of the multilevel polymer and thin film layers below the bond tabs of this invention.
Many types of electrical connections and connection processes have been disclosed, for example, U.S. Pat. No. 3,762,040 entitled "Method of Forming Circuit Crossovers" discloses elaborate fabrication of compression formed semicircular terminals (35-80 mils long) which are gold plated and laminated in a press at 800 Psi and 340.degree. C. to transfer the ends of the crossovers from their carrier to functional lines. These process features could not be used with the present invention due to the macro size (35-80 mils) and the compression bonding parameters like 340.degree. C. temperature which would distort the polymer structure surrounding the bond tabs in the present invention.
A rather complex process for repairs of opens is disclosed in U.S. Pat. No. 4,259,367 (Dougherty, Jr.), where a conductor patch line is interconnected onto a good line through an insulating layer. This requires the addition of new wiring layers with photolithographic techniques which would be incompatible with a substrate with components already in place.
Another method of repairing opens is by decal transfer as disclosed in U.S. Pat. No. 4,704,304 (Amendola, et al.), and presently assigned to IBM Corporation.
Another method of electric circuit line repairs is taught in U.S. Pat. No. 4,630,355 (Johnson). A layer of phase-change material is deposited prior to the deposition of the conductive line and in case an open results in the conductive line, a current is passed through the phase-change material so that a portion of it becomes electrically conductive and makes an electrical bridge across the gap or open. This method is not suitable for repairs on polyimide films due to lack of adhesion of such phase-change materials to polyimide.
In U.S. Pat. No. 4,418,264 (Thorwarth), a specifically shaped metallic part is placed on the conductor path interruption and by means of micro-resistance welding, the metallic part is welded to the conductor to bridge the interruption. Welding involves melting of the repair material which when used on current "state of the art" thin film polymer packages could cause structural damage to the polymer. Welding also requires the passage of high drive currents which would be incompatible with this invention as there are active devices which are connected to the lines being repaired at different locations, and with the high drive current these active devices would be damaged.
Another method of repairing opens and narrow necks has been disclosed in U.S. Pat. No. 4,919,971 (Chen). The defective site in the conductor line having a thin portion or a narrow neck does not have to be physically located to initiate the repairs. The process is self-induced, i.e., the passage of the drive current creates a hot spot at the defective site and conductive material is induced to be deposited at the defective site. This process is also self-limiting, i.e., when the defect has been repaired, the process will slow down and stop by itself. This technique requires the substrate to be immersed in a plating bath or be exposed to organometallic vapors which would make it incompatible with line repair processes where the active and passive components have already been mounted on the substrate.
"Conductive Line Jumper/Repair Connection in Glass Metal Module," IBM Technical Disclosure Bulletin, Vol. 15, No. 8, Page 2423 (January 1973), discloses another method of making open repairs. Here after the open has been located, a wire is placed across the open line and the wire is welded to each end of the open line. After welding the repaired plane is glassed over leaving a surface suitable for developing another circuit layer. This process teaches the repairs of the carrier at the build level, and not at the functional module level. This process also requires the use of high melting point metals and a subsequent sintering of inorganic materials.
Another welding process for repairing of opens is discussed in, "Circuit Repair/Work of Metallized Polyimide Substrates," IBM Technical Disclosure Bulletin, Vol. 22, No. 9, page 3986 (February 1980). A piece of wire is jumpered across the open and both ends of the jumpered wire are welded to the circuit line, thus yielding a "continuous electrical line." This process also discloses the use of high melting point metals.
Another method of making circuit repairs is disclosed in, "Tailless Thermo-Compression Bonding," IBM Technical Disclosure Bulletin, Vol. 27, No. 5, page 3041 (October 1984), where the circuit line is repaired by passing an electric current between two electrodes which fuse the circuit line and the repair material together.
"Josephson Package Repair," IBM Technical Disclosure Bulletin, Vol. 26, No. 12, pages 6244-6245 (May 1984), is another example of making repairs. The faulty circuits are cut out by laser scribing, and the repair of an open is done by cutting the bad line next to the pad and using a third wiring level to reconnect to the proper pads. This process has the limitation of requiring photolithographic techniques to form the new wiring level. Furthermore, additional thin film process steps cannot be done after chips, pins etc, have been attached.
Laser deposition methods are also being developed for repairing circuit opens. As disclosed in pending U.S. patent application Ser. No. 223,487, filed on Jul. 25, 1988, and presently assigned to IBM Corporation, an open circuit is repaired by laser induced electroplating process based on the thermobattery effect. One tip of the open conductor is heated with a laser beam, and a thermobattery is formed between the hot spot (tip of the conductor) and the cold part (normal section of the conductor). The laser heating of the tip induces the conductive material present in the plating solution to be formed at the hot tip. This process is continued until the growth of the conductive material joins the two open ends of the open, and a continuous electrical path is formed.
Another process for interconnecting thin-film electrical circuits is taught in U.S. Pat. No. 4,880,959, and presently assigned to IBM Corporation. Both ends of the existing circuit are partially ablated at the open defect site with pulses from an excimer laser, and then gold metal is deposited by LCVD (Laser Chemical Vapor Deposition). This process makes the repairs right after the thin film deposition, and prior to any subsequent module build (i.e. at the substrate level).
Under some circumstances a laser, as disclosed in U.S. Pat. No. 4,572,941 (Sciaky, et al.), could be used to make spot welds. The laser induced melting can cause structural damage to sensitive dielectrics and adjoining lines.
Still another disclosure entitled "Device and Method for Repairing Conductor Path Breaks by Welding" U.S. Pat. No. 4,418,264, refers to the use of a resistance welding apparatus where there exists a circular central electrode and two semi-circular electrodes on opposite sides of the central electrode. Two power supplies are attached to the electrodes with the central electrode being common. The disclosure states that in one operation current flows through the electrodes and welds a tab to two lines as a repair process. It further states that a clock is incorporated in the device to switch the current from one outside electrode to the other and back again many times during the weld. This is because current would take the path of least resistance and create uneven/non-uniform melting of both tabs if a true simultaneous operation was tried.
IBM Disclosure, Vol. 18, No. 12, p. 3984 (May 1976) entitled "Individually Controllable Wire Solder Reflow Bonding Tip," is similar to U.S. Pat. No. 4,418,264, in that it also uses two power supplies to solder reflow two wires by using three (3) electrodes, one being a common.
These two documents refer to resistance welding using complex devices to melt metal wires or tab in place for the purpose of making electrical connections. Once again welding is too harsh a process to be used on a multilevel polymer/thin film package. The use of two power supplies, one for each end of the connection, does in fact simulate the conventional stitch bond approach so vastly used throughout the electronics industry.
On the other hand the invention of this patent application discloses "simultaneous electrical connection" which is making an electrical connection between two separate pads and/or lines by simultaneously ultrasonically bonding each end of a wire staple during one bond cycle.
Among other things, the invention of this patent application describes an electrical connection process after active and passive components may have been attached to the substrate. This can be done by using a micro-wire or staple and simultaneously securing it to two or more electrical pads or connections, and forming an electrically continuous path. The attaching of the micro-wire or staple can be accomplished by using brazing, ultrasonic bonding, lasersonic bonding, thermo-compression bonding or any combination of these methods.
The process of this invention allows electrical connection to be accomplished in one step which is another advantage over the other methods.
This process is novel in that it enables the electrical connection and rerouting of electrical lines after the module has been built.
The present invention relates generally to a new method of making electrical connections on high density electronic packaging. Various methods of making electrical connections are used throughout the industry such as solder connections, pluggable or contact connections, as well as ultrasonic, lasersonic, thermocompression and micro surface welding. This invention focuses on, but is not limited to, the simultaneous bonding of a wire connector to two separate and distinct bond pads for the purpose of creating a functional electrical net. The bond pads can be part of a multilevel polyimide, thin film structure.